Analysis of Non-ideal Effects of Pipelined ADC by Using MATLAB - Simulink
نویسندگان
چکیده
The presented work deals with analysis of non-ideal effect of pipelined analog-to-digital converter (ADC) such as random capacitor mismatch, comparator offset and finite op-amp gain. These factors arise during a conversion in the pipelined ADC when using CMOS technology and switched-capacitors (SC) technique. The pipelined ADC was simulated in MATLAB-Simulink simulation environment. Key-Words: Pipelined ADC, MDAC, SC technique, Matlab model, Operational amplifier, Capacitor mismatch
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